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Text File  |  1996-01-16  |  150KB  |  4,343 lines

  1. #
  2. #    $Id: stl00017.da@ 1.18 1996/01/15 18:42:01 jbrennei Exp $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00017.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 4MB, IBM 526 175Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Dac=ibm525.dac
  14. Cursor=ibm525.cur
  15. PixClk=ibm525.clk
  16. Draweng=s3x68.drw
  17.  
  18. [BoardInfo]
  19. bViewports=1
  20. bNewMMIO=1
  21. bTwoPtLine=1
  22.  
  23. [Desktops]
  24. 2048,1536,8
  25. 2048,768,8
  26. 1600,1200,16
  27. 1600,1200,8
  28. 1280,1024,24
  29. 1280,1024,16
  30. 1280,1024,8
  31. 1152,864,32
  32. 1152,864,24
  33. 1152,864,16
  34. 1152,864,8
  35. 1024,3072,8
  36. 1024,1536,16
  37. 1024,1536,8
  38. 1024,768,32
  39. 1024,768,24
  40. 1024,768,16
  41. 1024,768,8
  42. 800,600,32
  43. 800,600,24
  44. 800,600,16
  45. 800,600,8
  46. 640,480,32
  47. 640,480,24
  48. 640,480,16
  49. 640,480,8
  50.  
  51. [Viewports]
  52. 1600,1200,16,82,66
  53. 1600,1200,16,75,60
  54. 1600,1200,8,82,66
  55. 1600,1200,8,75,60
  56. 1280,1024,24,79,75
  57. 1280,1024,24,76,72
  58. 1280,1024,24,64,60
  59. 1280,1024,16,95,90
  60. 1280,1024,16,79,75
  61. 1280,1024,16,76,72
  62. 1280,1024,16,64,60
  63. 1280,1024,8,95,90
  64. 1280,1024,8,79,75
  65. 1280,1024,8,76,72
  66. 1280,1024,8,64,60
  67. 1152,864,32,64,70
  68. 1152,864,32,56,60
  69. 1152,864,24,64,70
  70. 1152,864,24,56,60
  71. 1152,864,16,82,90
  72. 1152,864,16,71,75
  73. 1152,864,16,64,70
  74. 1152,864,16,56,60
  75. 1152,864,8,82,90
  76. 1152,864,8,71,75
  77. 1152,864,8,64,70
  78. 1152,864,8,56,60
  79. 1024,768,32,64,80
  80. 1024,768,32,60,75
  81. 1024,768,32,58,72
  82. 1024,768,32,56,70
  83. 1024,768,32,48,60
  84. 1024,768,24,64,80
  85. 1024,768,24,60,75
  86. 1024,768,24,58,72
  87. 1024,768,24,56,70
  88. 1024,768,24,48,60
  89. 1024,768,16,96,120
  90. 1024,768,16,81,100
  91. 1024,768,16,64,80
  92. 1024,768,16,60,75
  93. 1024,768,16,58,72
  94. 1024,768,16,56,70
  95. 1024,768,16,48,60
  96. 1024,768,8,96,120
  97. 1024,768,8,81,100
  98. 1024,768,8,64,80
  99. 1024,768,8,60,75
  100. 1024,768,8,58,72
  101. 1024,768,8,56,70
  102. 1024,768,8,48,60
  103. 800,600,32,75,120
  104. 800,600,32,64,100
  105. 800,600,32,56,90
  106. 800,600,32,46,75
  107. 800,600,32,48,72
  108. 800,600,32,37,60
  109. 800,600,32,35,56
  110. 800,600,24,75,120
  111. 800,600,24,64,100
  112. 800,600,24,56,90
  113. 800,600,24,46,75
  114. 800,600,24,48,72
  115. 800,600,24,37,60
  116. 800,600,24,35,56
  117. 800,600,16,75,120
  118. 800,600,16,64,100
  119. 800,600,16,56,90
  120. 800,600,16,46,75
  121. 800,600,16,48,72
  122. 800,600,16,37,60
  123. 800,600,16,35,56
  124. 800,600,8,75,120
  125. 800,600,8,64,100
  126. 800,600,8,56,90
  127. 800,600,8,46,75
  128. 800,600,8,48,72
  129. 800,600,8,37,60
  130. 800,600,8,35,56
  131. 640,480,32,64,120
  132. 640,480,32,52,100
  133. 640,480,32,48,90
  134. 640,480,32,37,75
  135. 640,480,32,37,72
  136. 640,480,32,31,60
  137. 640,480,24,64,120
  138. 640,480,24,52,100
  139. 640,480,24,48,90
  140. 640,480,24,37,75
  141. 640,480,24,37,72
  142. 640,480,24,31,60
  143. 640,480,16,64,120
  144. 640,480,16,52,100
  145. 640,480,16,48,90
  146. 640,480,16,37,75
  147. 640,480,16,37,72
  148. 640,480,16,31,60
  149. 640,480,8,64,120
  150. 640,480,8,52,100
  151. 640,480,8,48,90
  152. 640,480,8,37,75
  153. 640,480,8,37,72
  154. 640,480,8,31,60
  155.  
  156. [TextMode]
  157. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  158. SHELL, I10, 0x0003,  0x0000
  159. CRT, RUN, REG_LOCK_1, 0x48
  160. CRT, RUN, REG_LOCK_2, 0xA5
  161.  
  162. [GraphicsEnable]
  163. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  164. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  165.  
  166. [GraphicsDisable]
  167. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  168. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  169.  
  170. [2048,1536,8]
  171. # Setting Line Pitch
  172. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  173. CRT,RUN,EXT_MODE,0x00
  174. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  175. # Setting Engine Pitch
  176. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  177. CRT,RUN,MEM_CONFIG,0x8f
  178. # Setting Basic Mode Registers.The registers
  179. # below are neither Desktop or Viewport Regs
  180. # Unlock Sequencer
  181. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  182. # Dump Sequencer Registers
  183. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  184. # Dump Graphics Controller Registers
  185. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  186. # Dump Attribute Controller Registers
  187. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  188. # Lock Sequencer
  189. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  190. DAC_IDR, RUN, DAC_OPERATION, 0x02
  191. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  192. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  193. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  194. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  195. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  196. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  197. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  198. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  199. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  200.  
  201. [2048,768,8]
  202. # Setting Line Pitch
  203. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  204. CRT,RUN,EXT_MODE,0x00
  205. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  206. # Setting Engine Pitch
  207. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  208. CRT,RUN,MEM_CONFIG,0x8f
  209. # Setting Basic Mode Registers.The registers
  210. # below are neither Desktop or Viewport Regs
  211. # Unlock Sequencer
  212. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  213. # Dump Sequencer Registers
  214. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  215. # Dump Graphics Controller Registers
  216. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  217. # Dump Attribute Controller Registers
  218. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  219. # Lock Sequencer
  220. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  221. DAC_IDR, RUN, DAC_OPERATION, 0x02
  222. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  223. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  224. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  225. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  226. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  227. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  228. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  229. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  230. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  231.  
  232. [1024,3072,8]
  233. # Setting Line Pitch
  234. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  235. CRT,RUN,EXT_MODE,0x00
  236. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  237. # Setting Engine Pitch
  238. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  239. CRT,RUN,MEM_CONFIG,0x09
  240. # Setting Basic Mode Registers.The registers
  241. # below are neither Desktop or Viewport Regs
  242. # Unlock Sequencer
  243. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  244. # Dump Sequencer Registers
  245. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  246. # Dump Graphics Controller Registers
  247. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  248. # Dump Attribute Controller Registers
  249. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  250. # Lock Sequencer
  251. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  252. DAC_IDR, RUN, DAC_OPERATION, 0x02
  253. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  254. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  255. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  256. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  257. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  258. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  259. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  260. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  261. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  262.  
  263. [1024,1536,8]
  264. # Setting Line Pitch
  265. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  266. CRT,RUN,EXT_MODE,0x00
  267. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  268. # Setting Engine Pitch
  269. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  270. CRT,RUN,MEM_CONFIG,0x09
  271. # Setting Basic Mode Registers.The registers
  272. # below are neither Desktop or Viewport Regs
  273. # Unlock Sequencer
  274. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  275. # Dump Sequencer Registers
  276. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  277. # Dump Graphics Controller Registers
  278. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  279. # Dump Attribute Controller Registers
  280. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  281. # Lock Sequencer
  282. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  283. DAC_IDR, RUN, DAC_OPERATION, 0x02
  284. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  285. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  286. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  287. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  288. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  289. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  290. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  291. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  292. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  293.  
  294. [1024,1536,16]
  295. # Setting Line Pitch
  296. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  297. CRT,RUN,EXT_MODE,0x00
  298. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  299. # Setting Engine Pitch
  300. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  301. CRT,RUN,MEM_CONFIG,0x89
  302. # Setting Basic Mode Registers.The registers
  303. # below are neither Desktop or Viewport Regs
  304. # Unlock Sequencer
  305. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  306. # Dump Sequencer Registers
  307. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  308. # Dump Graphics Controller Registers
  309. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  310. # Dump Attribute Controller Registers
  311. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  312. # Lock Sequencer
  313. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  314. DAC_IDR, RUN, DAC_OPERATION, 0x02
  315. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  316. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  317. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  318. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  319. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  320. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  321. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  322. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  323. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  324.  
  325. [1600,1200,16]
  326. # Setting Line Pitch
  327. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  328. CRT,RUN,EXT_MODE,0x00
  329. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  330. # Setting Engine Pitch
  331. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x91
  332. CRT,RUN,MEM_CONFIG,0x8b
  333. # Setting Basic Mode Registers.The registers
  334. # below are neither Desktop or Viewport Regs
  335. # Unlock Sequencer
  336. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  337. # Dump Sequencer Registers
  338. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  339. # Dump Graphics Controller Registers
  340. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  341. # Dump Attribute Controller Registers
  342. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  343. # Lock Sequencer
  344. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  345. DAC_IDR, RUN, DAC_OPERATION, 0x02
  346. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  347. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  348. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  349. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  350. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  351. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  352. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  353. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  354. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  355.  
  356. [1600,1200,8]
  357. # Setting Line Pitch
  358. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  359. CRT,RUN,EXT_MODE,0x00
  360. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  361. # Setting Engine Pitch
  362. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  363. CRT,RUN,MEM_CONFIG,0x8b
  364. # Setting Basic Mode Registers.The registers
  365. # below are neither Desktop or Viewport Regs
  366. # Unlock Sequencer
  367. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  368. # Dump Sequencer Registers
  369. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  370. # Dump Graphics Controller Registers
  371. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  372. # Dump Attribute Controller Registers
  373. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  374. # Lock Sequencer
  375. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  376. DAC_IDR, RUN, DAC_OPERATION, 0x02
  377. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  378. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  379. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  380. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  381. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  382. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  383. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  384. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  385. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  386.  
  387. [1280,1024,24]
  388. # Setting Line Pitch
  389. CRT,RUN,LOGICAL_LINE_LENGTH,0xe0
  390. CRT,RUN,EXT_MODE,0x00
  391. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  392. # Setting Engine Pitch
  393. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xe0
  394. CRT,RUN,MEM_CONFIG,0x8b
  395. # Setting Basic Mode Registers.The registers
  396. # below are neither Desktop or Viewport Regs
  397. # Unlock Sequencer
  398. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  399. # Dump Sequencer Registers
  400. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  401. # Dump Graphics Controller Registers
  402. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  403. # Dump Attribute Controller Registers
  404. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  405. # Lock Sequencer
  406. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  407. DAC_IDR, RUN, DAC_OPERATION, 0x02
  408. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  409. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  410. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  411. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  412. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  413. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  414. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  415. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  416. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  417.  
  418. [1280,1024,16]
  419. # Setting Line Pitch
  420. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  421. CRT,RUN,EXT_MODE,0x00
  422. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  423. # Setting Engine Pitch
  424. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xd0
  425. CRT,RUN,MEM_CONFIG,0x8b
  426. # Setting Basic Mode Registers.The registers
  427. # below are neither Desktop or Viewport Regs
  428. # Unlock Sequencer
  429. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  430. # Dump Sequencer Registers
  431. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  432. # Dump Graphics Controller Registers
  433. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  434. # Dump Attribute Controller Registers
  435. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  436. # Lock Sequencer
  437. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  438. DAC_IDR, RUN, DAC_OPERATION, 0x02
  439. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  440. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  441. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  442. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  443. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  444. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  445. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  446. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  447. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  448.  
  449. [1280,1024,8]
  450. # Setting Line Pitch
  451. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  452. CRT,RUN,EXT_MODE,0x00
  453. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  454. # Setting Engine Pitch
  455. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  456. CRT,RUN,MEM_CONFIG,0x0b
  457. # Setting Basic Mode Registers.The registers
  458. # below are neither Desktop or Viewport Regs
  459. # Unlock Sequencer
  460. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  461. # Dump Sequencer Registers
  462. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  463. # Dump Graphics Controller Registers
  464. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  465. # Dump Attribute Controller Registers
  466. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  467. # Lock Sequencer
  468. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  469. DAC_IDR, RUN, DAC_OPERATION, 0x02
  470. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  471. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  472. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  473. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  474. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  475. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  476. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  477. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  478. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  479.  
  480. [1152,864,32]
  481. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  482. CRT,RUN,EXT_MODE,0x00
  483. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  484. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x31
  485. CRT,RUN,MEM_CONFIG,0x89
  486. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  487. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  488. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  489. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  490. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  491. DAC_IDR, RUN, DAC_OPERATION, 0x02
  492. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  493. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  494. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  495. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  496. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  497. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  498. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  499. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  500. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  501.  
  502. [1152,864,24]
  503. # Setting Line Pitch
  504. CRT,RUN,LOGICAL_LINE_LENGTH,0xb0
  505. CRT,RUN,EXT_MODE,0x00
  506. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  507. # Setting Engine Pitch
  508. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x21
  509. CRT,RUN,MEM_CONFIG,0x8b
  510. # Setting Basic Mode Registers.The registers
  511. # below are neither Desktop or Viewport Regs
  512. # Unlock Sequencer
  513. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  514. # Dump Sequencer Registers
  515. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  516. # Dump Graphics Controller Registers
  517. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  518. # Dump Attribute Controller Registers
  519. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  520. # Lock Sequencer
  521. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  522. DAC_IDR, RUN, DAC_OPERATION, 0x02
  523. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  524. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  525. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  526. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  527. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  528. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  529. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  530. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  531. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  532.  
  533. [1152,864,16]
  534. # Setting Line Pitch
  535. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  536. CRT,RUN,EXT_MODE,0x00
  537. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  538. # Setting Engine Pitch
  539. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  540. CRT,RUN,MEM_CONFIG,0x8b
  541. # Setting Basic Mode Registers.The registers
  542. # below are neither Desktop or Viewport Regs
  543. # Unlock Sequencer
  544. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  545. # Dump Sequencer Registers
  546. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  547. # Dump Graphics Controller Registers
  548. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  549. # Dump Attribute Controller Registers
  550. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  551. # Lock Sequencer
  552. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  553. DAC_IDR, RUN, DAC_OPERATION, 0x02
  554. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  555. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  556. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  557. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  558. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  559. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  560. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  561. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  562. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  563.  
  564. [1152,864,8]
  565. # Setting Line Pitch
  566. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  567. CRT,RUN,EXT_MODE,0x00
  568. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  569. # Setting Engine Pitch
  570. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  571. CRT,RUN,MEM_CONFIG,0x89
  572. # Setting Basic Mode Registers.The registers
  573. # below are neither Desktop or Viewport Regs
  574. # Unlock Sequencer
  575. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  576. # Dump Sequencer Registers
  577. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  578. # Dump Graphics Controller Registers
  579. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  580. # Dump Attribute Controller Registers
  581. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  582. # Lock Sequencer
  583. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  584. DAC_IDR, RUN, DAC_OPERATION, 0x02
  585. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  586. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  587. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  588. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  589. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  590. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  591. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  592. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  593. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  594.  
  595. [1024,768,32]
  596. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  597. CRT,RUN,EXT_MODE,0x00
  598. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  599. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x30
  600. CRT,RUN,MEM_CONFIG,0x89
  601. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  602. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  603. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  604. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  605. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  606. DAC_IDR, RUN, DAC_OPERATION, 0x02
  607. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  608. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  609. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  610. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  611. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  612. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  613. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  614. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  615. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  616.  
  617. [1024,768,24]
  618. # Setting Line Pitch
  619. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  620. CRT,RUN,EXT_MODE,0x00
  621. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  622. # Setting Engine Pitch
  623. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x20
  624. CRT,RUN,MEM_CONFIG,0x89
  625. # Setting Basic Mode Registers.The registers
  626. # below are neither Desktop or Viewport Regs
  627. # Unlock Sequencer
  628. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  629. # Dump Sequencer Registers
  630. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  631. # Dump Graphics Controller Registers
  632. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  633. # Dump Attribute Controller Registers
  634. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  635. # Lock Sequencer
  636. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  637. DAC_IDR, RUN, DAC_OPERATION, 0x02
  638. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  639. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  640. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  641. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  642. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  643. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  644. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  645. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  646. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  647.  
  648. [1024,768,16]
  649. # Setting Line Pitch
  650. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  651. CRT,RUN,EXT_MODE,0x00
  652. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  653. # Setting Engine Pitch
  654. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  655. CRT,RUN,MEM_CONFIG,0x89
  656. # Setting Basic Mode Registers.The registers
  657. # below are neither Desktop or Viewport Regs
  658. # Unlock Sequencer
  659. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  660. # Dump Sequencer Registers
  661. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  662. # Dump Graphics Controller Registers
  663. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  664. # Dump Attribute Controller Registers
  665. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  666. # Lock Sequencer
  667. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  668. DAC_IDR, RUN, DAC_OPERATION, 0x02
  669. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  670. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  671. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  672. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  673. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  674. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  675. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  676. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  677. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  678.  
  679. [1024,768,8]
  680. # Setting Line Pitch
  681. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  682. CRT,RUN,EXT_MODE,0x00
  683. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  684. # Setting Engine Pitch
  685. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  686. CRT,RUN,MEM_CONFIG,0x09
  687. # Setting Basic Mode Registers.The registers
  688. # below are neither Desktop or Viewport Regs
  689. # Unlock Sequencer
  690. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  691. # Dump Sequencer Registers
  692. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  693. # Dump Graphics Controller Registers
  694. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  695. # Dump Attribute Controller Registers
  696. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  697. # Lock Sequencer
  698. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  699. DAC_IDR, RUN, DAC_OPERATION, 0x02
  700. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  701. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  702. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  703. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  704. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  705. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  706. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  707. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  708. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  709.  
  710. [800,600,32]
  711. # Setting Line Pitch
  712. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  713. CRT,RUN,EXT_MODE,0x00
  714. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  715. # Setting Engine Pitch
  716. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  717. CRT,RUN,MEM_CONFIG,0x8b
  718. # Setting Basic Mode Registers.The registers
  719. # below are neither Desktop or Viewport Regs
  720. # Unlock Sequencer
  721. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  722. # Dump Sequencer Registers
  723. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  724. # Dump Graphics Controller Registers
  725. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  726. # Dump Attribute Controller Registers
  727. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  728. # Lock Sequencer
  729. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  730. DAC_IDR, RUN, DAC_OPERATION, 0x02
  731. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  732. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  733. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  734. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  735. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  736. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  737. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  738. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  739. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  740.  
  741. [800,600,24]
  742. # Setting Line Pitch
  743. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  744. CRT,RUN,EXT_MODE,0x00
  745. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  746. # Setting Engine Pitch
  747. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  748. CRT,RUN,MEM_CONFIG,0x8b
  749. # Setting Basic Mode Registers.The registers
  750. # below are neither Desktop or Viewport Regs
  751. # Unlock Sequencer
  752. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  753. # Dump Sequencer Registers
  754. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  755. # Dump Graphics Controller Registers
  756. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  757. # Dump Attribute Controller Registers
  758. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  759. # Lock Sequencer
  760. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  761. DAC_IDR, RUN, DAC_OPERATION, 0x02
  762. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  763. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  764. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  765. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  766. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  767. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  768. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  769. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  770. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  771.  
  772. [800,600,16]
  773. # Setting Line Pitch
  774. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  775. CRT,RUN,EXT_MODE,0x00
  776. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  777. # Setting Engine Pitch
  778. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  779. CRT,RUN,MEM_CONFIG,0x8b
  780. # Setting Basic Mode Registers.The registers
  781. # below are neither Desktop or Viewport Regs
  782. # Unlock Sequencer
  783. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  784. # Dump Sequencer Registers
  785. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  786. # Dump Graphics Controller Registers
  787. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  788. # Dump Attribute Controller Registers
  789. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  790. # Lock Sequencer
  791. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  792. DAC_IDR, RUN, DAC_OPERATION, 0x02
  793. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  794. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  795. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  796. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  797. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  798. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  799. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  800. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  801. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  802.  
  803. [800,600,8]
  804. # Setting Line Pitch
  805. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  806. CRT,RUN,EXT_MODE,0x00
  807. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  808. # Setting Engine Pitch
  809. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  810. CRT,RUN,MEM_CONFIG,0x8b
  811. # Setting Basic Mode Registers.The registers
  812. # below are neither Desktop or Viewport Regs
  813. # Unlock Sequencer
  814. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  815. # Dump Sequencer Registers
  816. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  817. # Dump Graphics Controller Registers
  818. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  819. # Dump Attribute Controller Registers
  820. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  821. # Lock Sequencer
  822. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  823. DAC_IDR, RUN, DAC_OPERATION, 0x02
  824. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  825. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  826. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  827. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  828. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  829. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  830. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  831. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  832. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  833.  
  834. [640,480,32]
  835. # Setting Line Pitch
  836. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  837. CRT,RUN,EXT_MODE,0x00
  838. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  839. # Setting Engine Pitch
  840. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  841. CRT,RUN,MEM_CONFIG,0x8b
  842. # Setting Basic Mode Registers.The registers
  843. # below are neither Desktop or Viewport Regs
  844. # Unlock Sequencer
  845. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  846. # Dump Sequencer Registers
  847. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  848. # Dump Graphics Controller Registers
  849. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  850. # Dump Attribute Controller Registers
  851. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  852. # Lock Sequencer
  853. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  854. DAC_IDR, RUN, DAC_OPERATION, 0x02
  855. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  856. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  857. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  858. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  859. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  860. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  861. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  862. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  863. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  864.  
  865. [640,480,24]
  866. # Setting Line Pitch
  867. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  868. CRT,RUN,EXT_MODE,0x00
  869. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  870. # Setting Engine Pitch
  871. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  872. CRT,RUN,MEM_CONFIG,0x8b
  873. # Setting Basic Mode Registers.The registers
  874. # below are neither Desktop or Viewport Regs
  875. # Unlock Sequencer
  876. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  877. # Dump Sequencer Registers
  878. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  879. # Dump Graphics Controller Registers
  880. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  881. # Dump Attribute Controller Registers
  882. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  883. # Lock Sequencer
  884. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  885. DAC_IDR, RUN, DAC_OPERATION, 0x02
  886. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  887. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  888. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  889. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  890. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  891. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  892. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  893. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  894. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  895.  
  896. [640,480,16]
  897. # Setting Line Pitch
  898. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  899. CRT,RUN,EXT_MODE,0x00
  900. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  901. # Setting Engine Pitch
  902. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  903. CRT,RUN,MEM_CONFIG,0x8b
  904. # Setting Basic Mode Registers.The registers
  905. # below are neither Desktop or Viewport Regs
  906. # Unlock Sequencer
  907. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  908. # Dump Sequencer Registers
  909. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  910. # Dump Graphics Controller Registers
  911. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  912. # Dump Attribute Controller Registers
  913. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  914. # Lock Sequencer
  915. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  916. DAC_IDR, RUN, DAC_OPERATION, 0x02
  917. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  918. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  919. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  920. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  921. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  922. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  923. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  924. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  925. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  926.  
  927. [640,480,8]
  928. # Setting Line Pitch
  929. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  930. CRT,RUN,EXT_MODE,0x00
  931. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  932. # Setting Engine Pitch
  933. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  934. CRT,RUN,MEM_CONFIG,0x8b
  935. # Setting Basic Mode Registers.The registers
  936. # below are neither Desktop or Viewport Regs
  937. # Unlock Sequencer
  938. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  939. # Dump Sequencer Registers
  940. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  941. # Dump Graphics Controller Registers
  942. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  943. # Dump Attribute Controller Registers
  944. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  945. # Lock Sequencer
  946. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  947. DAC_IDR, RUN, DAC_OPERATION, 0x02
  948. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  949. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  950. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  951. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  952. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  953. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  954. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  955. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  956. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  957.  
  958.  
  959. [1600,1200,16,82,66]
  960. # Unlock CRTC
  961. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  962. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  963. CRT,RUN,REG_LOCK_1,0x48,0xa5
  964. # Dump CRT Controller Registers
  965. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  966. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  967. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  968. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  969. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  970. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  971. CRT,RUN,MODE_CONTROL,0x02
  972. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  973. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  974. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  975. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  976. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  977. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  978. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  979. # Lock CRTC Reg 11 for compatibility
  980. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  981. # Dump ENG Register
  982. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  983. # Dump MISCOUT Register
  984. DIR,RUN,MISC_WRITE,0xef
  985. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  986. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  987. CLK_IND, RUN, FREQ_2, 0xd3
  988. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  989. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  990. CRT,RUN,LATCH_DATA, 0x00
  991.  
  992. [1600,1200,16,75,60]
  993. # Unlock CRTC
  994. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  995. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  996. CRT,RUN,REG_LOCK_1,0x48,0xa5
  997. # Dump CRT Controller Registers
  998. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  999. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1000. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1001. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1002. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1003. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1004. CRT,RUN,MODE_CONTROL,0x02
  1005. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1006. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1007. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1008. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1009. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1010. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1011. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1012. # Lock CRTC Reg 11 for compatibility
  1013. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1014. # Dump ENG Register
  1015. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1016. # Dump MISCOUT Register
  1017. DIR,RUN,MISC_WRITE,0xef
  1018. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1019. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1020. CLK_IND, RUN, FREQ_2, 0xcd
  1021. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1022. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1023. CRT,RUN,LATCH_DATA, 0x00
  1024.  
  1025.  
  1026. [1600,1200,8,82,66]
  1027. # Unlock CRTC
  1028. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1029. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1030. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1031. # Dump CRT Controller Registers
  1032. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  1033. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1034. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1035. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1036. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1037. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  1038. CRT,RUN,MODE_CONTROL,0x02
  1039. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1040. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1041. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1042. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1043. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1044. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1045. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1046. # Lock CRTC Reg 11 for compatibility
  1047. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1048. # Dump ENG Register
  1049. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1050. # Dump MISCOUT Register
  1051. DIR,RUN,MISC_WRITE,0xef
  1052. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1053. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1054. CLK_IND, RUN, FREQ_2, 0xd3
  1055. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1056. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1057. CRT,RUN,LATCH_DATA, 0x08
  1058.  
  1059. [1600,1200,8,75,60]
  1060. # Unlock CRTC
  1061. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1062. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1063. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1064. # Dump CRT Controller Registers
  1065. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1066. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1067. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1068. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1069. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1070. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1071. CRT,RUN,MODE_CONTROL,0x02
  1072. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1073. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1074. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1075. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1076. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1077. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1078. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1079. # Lock CRTC Reg 11 for compatibility
  1080. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1081. # Dump ENG Register
  1082. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1083. # Dump MISCOUT Register
  1084. DIR,RUN,MISC_WRITE,0xef
  1085. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1086. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1087. CLK_IND, RUN, FREQ_2, 0xcd
  1088. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1089. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1090. CRT,RUN,LATCH_DATA, 0x08
  1091.  
  1092. [1280,1024,24,79,75]
  1093. # Unlock CRTC
  1094. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1095. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1096. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1097. # Dump CRT Controller Registers
  1098. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7e,0x06,0x29,0x42,0x00,0x40
  1099. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1100. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1101. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x03,0xe3,0xff
  1102. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1103. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1104. CRT,RUN,MODE_CONTROL,0x02
  1105. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1106. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1107. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1108. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1109. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1110. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1111. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1112. # Lock CRTC Reg 11 for compatibility
  1113. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1114. # Dump ENG Register
  1115. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1116. # Dump MISCOUT Register
  1117. DIR,RUN,MISC_WRITE,0xef
  1118. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1119. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1120. CLK_IND, RUN, FREQ_2, 0xc1
  1121. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1122. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1123. CRT,RUN,LATCH_DATA, 0x00
  1124.  
  1125. [1280,1024,24,76,72]
  1126. # Unlock CRTC
  1127. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1128. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1129. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1130. # Dump CRT Controller Registers
  1131. CRT,RUN,HORZ_TOTAL,0xa0,0x77,0x78,0x84,0x7f,0x07,0x2c,0x42,0x00,0x40
  1132. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1133. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1134. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x06,0xe3,0xff
  1135. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1136. CRT,RUN,MISC_1,0x15,0x9a,0x28,0x11
  1137. CRT,RUN,MODE_CONTROL,0x02
  1138. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1139. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1140. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1141. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1142. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1143. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1144. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1145. # Lock CRTC Reg 11 for compatibility
  1146. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1147. # Dump ENG Register
  1148. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1149. # Dump MISCOUT Register
  1150. DIR,RUN,MISC_WRITE,0xef
  1151. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1152. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1153. CLK_IND, RUN, FREQ_2, 0xc1
  1154. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1155. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1156. CRT,RUN,LATCH_DATA, 0x00
  1157.  
  1158. [1280,1024,24,64,60]
  1159. # Unlock CRTC
  1160. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1161. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1162. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1163. # Dump CRT Controller Registers
  1164. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x05,0x34,0x42,0x00,0x40
  1165. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1166. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1167. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1168. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1169. CRT,RUN,MISC_1,0x15,0x95,0x28,0x11
  1170. CRT,RUN,MODE_CONTROL,0x02
  1171. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1172. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1173. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1174. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1175. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1176. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1177. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1178. # Lock CRTC Reg 11 for compatibility
  1179. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1180. # Dump ENG Register
  1181. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1182. # Dump MISCOUT Register
  1183. DIR,RUN,MISC_WRITE,0xef
  1184. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1185. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1186. CLK_IND, RUN, FREQ_2, 0xab
  1187. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1188. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1189. CRT,RUN,LATCH_DATA, 0x00
  1190.  
  1191. [1280,1024,16,95,90]
  1192. # Unlock CRTC
  1193. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1194. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1195. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1196. # Dump CRT Controller Registers
  1197. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1198. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1199. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1200. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1201. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1202. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1203. CRT,RUN,MODE_CONTROL,0x02
  1204. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1205. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1206. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1207. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1208. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1209. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1210. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1211. # Lock CRTC Reg 11 for compatibility
  1212. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1213. # Dump ENG Register
  1214. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1215. # Dump MISCOUT Register
  1216. DIR,RUN,MISC_WRITE,0xef
  1217. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1218. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1219. CLK_IND, RUN, FREQ_2, 0xd0
  1220. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1221. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1222. CRT,RUN,LATCH_DATA, 0x00
  1223.  
  1224. [1280,1024,16,79,75]
  1225. # Unlock CRTC
  1226. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1227. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1228. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1229. # Dump CRT Controller Registers
  1230. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1231. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1232. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1233. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1234. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1235. CRT,RUN,MISC_1,0x15,0x5e,0x33,0x11
  1236. CRT,RUN,MODE_CONTROL,0x02
  1237. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1238. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1239. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1240. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1241. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1242. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1243. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1244. # Lock CRTC Reg 11 for compatibility
  1245. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1246. # Dump ENG Register
  1247. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1248. # Dump MISCOUT Register
  1249. DIR,RUN,MISC_WRITE,0xef
  1250. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1251. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1252. CLK_IND, RUN, FREQ_2, 0xc1
  1253. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1254. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1255. CRT,RUN,LATCH_DATA, 0x00
  1256.  
  1257. [1280,1024,16,76,72]
  1258. # Unlock CRTC
  1259. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1260. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1261. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1262. # Dump CRT Controller Registers
  1263. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1264. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1265. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1266. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1267. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1268. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1269. CRT,RUN,MODE_CONTROL,0x02
  1270. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1271. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1272. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1273. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1274. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1275. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1276. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1277. # Lock CRTC Reg 11 for compatibility
  1278. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1279. # Dump ENG Register
  1280. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1281. # Dump MISCOUT Register
  1282. DIR,RUN,MISC_WRITE,0xef
  1283. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1284. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1285. CLK_IND, RUN, FREQ_2, 0xc1
  1286. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1287. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1288. CRT,RUN,LATCH_DATA, 0x00
  1289.  
  1290. [1280,1024,16,64,60]
  1291. # Unlock CRTC
  1292. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1293. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1294. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1295. # Dump CRT Controller Registers
  1296. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1297. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1298. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1299. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1300. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1301. CRT,RUN,MISC_1,0x15,0x5f,0x33,0x11
  1302. CRT,RUN,MODE_CONTROL,0x02
  1303. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1304. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1305. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1306. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1307. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1308. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1309. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1310. # Lock CRTC Reg 11 for compatibility
  1311. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1312. # Dump ENG Register
  1313. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1314. # Dump MISCOUT Register
  1315. DIR,RUN,MISC_WRITE,0xef
  1316. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1317. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1318. CLK_IND, RUN, FREQ_2, 0xab
  1319. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1320. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1321. CRT,RUN,LATCH_DATA, 0x00
  1322.  
  1323. [1280,1024,8,95,90]
  1324. # Unlock CRTC
  1325. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1326. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1327. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1328. # Dump CRT Controller Registers
  1329. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1330. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1331. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1332. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1333. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1334. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1335. CRT,RUN,MODE_CONTROL,0x02
  1336. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1337. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1338. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1339. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1340. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1341. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1342. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1343. # Lock CRTC Reg 11 for compatibility
  1344. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1345. # Dump ENG Register
  1346. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1347. # Dump MISCOUT Register
  1348. DIR,RUN,MISC_WRITE,0xef
  1349. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1350. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1351. CLK_IND, RUN, FREQ_2, 0xd0
  1352. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1353. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1354. CRT,RUN,LATCH_DATA, 0x08
  1355.  
  1356. [1280,1024,8,79,75]
  1357. # Unlock CRTC
  1358. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1359. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1360. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1361. # Dump CRT Controller Registers
  1362. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1363. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1364. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1365. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1366. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1367. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  1368. CRT,RUN,MODE_CONTROL,0x02
  1369. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1370. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1371. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1372. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1373. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1374. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1375. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1376. # Lock CRTC Reg 11 for compatibility
  1377. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1378. # Dump ENG Register
  1379. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1380. # Dump MISCOUT Register
  1381. DIR,RUN,MISC_WRITE,0xef
  1382. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1383. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1384. CLK_IND, RUN, FREQ_2, 0xc1
  1385. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1386. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1387. CRT,RUN,LATCH_DATA, 0x08
  1388.  
  1389. [1280,1024,8,76,72]
  1390. # Unlock CRTC
  1391. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1392. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1393. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1394. # Dump CRT Controller Registers
  1395. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1396. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1397. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1398. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1399. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1400. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1401. CRT,RUN,MODE_CONTROL,0x02
  1402. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1403. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1404. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1405. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1406. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1407. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1408. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1409. # Lock CRTC Reg 11 for compatibility
  1410. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1411. # Dump ENG Register
  1412. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1413. # Dump MISCOUT Register
  1414. DIR,RUN,MISC_WRITE,0xef
  1415. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1416. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1417. CLK_IND, RUN, FREQ_2, 0xc1
  1418. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1419. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1420. CRT,RUN,LATCH_DATA, 0x08
  1421.  
  1422. [1280,1024,8,64,60]
  1423. # Unlock CRTC
  1424. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1425. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1426. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1427. # Dump CRT Controller Registers
  1428. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1429. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1430. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1431. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1432. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1433. CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  1434. CRT,RUN,MODE_CONTROL,0x02
  1435. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1436. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1437. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1438. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1439. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1440. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1441. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1442. # Lock CRTC Reg 11 for compatibility
  1443. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1444. # Dump ENG Register
  1445. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1446. # Dump MISCOUT Register
  1447. DIR,RUN,MISC_WRITE,0xef
  1448. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1449. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1450. CLK_IND, RUN, FREQ_2, 0xab
  1451. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1452. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1453. CRT,RUN,LATCH_DATA, 0x08
  1454.  
  1455. [1152,864,32,64,70]
  1456. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1457. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1458. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1459. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1460. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1461. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1462. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1463. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1464. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1465. CRT,RUN,MODE_CONTROL,0x02
  1466. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1467. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1468. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1469. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1470. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1471. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1472. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1473. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1474. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1475. DIR,RUN,MISC_WRITE,0x2f
  1476. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1477. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1478. CLK_IND, RUN, FREQ_2, 0x9b
  1479. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1480. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1481. CRT,RUN,LATCH_DATA, 0x00
  1482.  
  1483. [1152,864,32,56,60]
  1484. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1485. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1486. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1487. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1488. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1489. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1490. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1491. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1492. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1493. CRT,RUN,MODE_CONTROL,0x02
  1494. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1495. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1496. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1497. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1498. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1499. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1500. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1501. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1502. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1503. DIR,RUN,MISC_WRITE,0x2f
  1504. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1505. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1506. CLK_IND, RUN, FREQ_2, 0x90
  1507. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1508. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1509. CRT,RUN,LATCH_DATA, 0x00
  1510.  
  1511. [1152,864,24,64,70]
  1512. # Unlock CRTC
  1513. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1514. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1515. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1516. # Dump CRT Controller Registers
  1517. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x16,0x92,0xff,0x00,0x60
  1518. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1519. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1520. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x7d,0xeb,0xff
  1521. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1522. CRT,RUN,MISC_1,0x15,0x7f,0x9f,0x11
  1523. CRT,RUN,MODE_CONTROL,0x02
  1524. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1525. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1526. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1527. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1528. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1529. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1530. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1531. # Lock CRTC Reg 11 for compatibility
  1532. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1533. # Dump ENG Register
  1534. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1535. # Dump MISCOUT Register
  1536. DIR,RUN,MISC_WRITE,0xef
  1537. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1538. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1539. CLK_IND, RUN, FREQ_2, 0x9b
  1540. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1541. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1542. CRT,RUN,LATCH_DATA, 0x00
  1543.  
  1544. [1152,864,24,56,60]
  1545. # Unlock CRTC
  1546. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1547. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1548. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1549. # Dump CRT Controller Registers
  1550. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x15,0xac,0xff,0x00,0x60
  1551. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1552. CRT,RUN,VERT_RETRACE_START,0x77,0x00,0x5f
  1553. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x99,0xeb,0xff
  1554. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  1555. CRT,RUN,MISC_1,0x15,0x7f,0x3d,0x11
  1556. CRT,RUN,MODE_CONTROL,0x02
  1557. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1558. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1559. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1560. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1561. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1562. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1563. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1564. # Lock CRTC Reg 11 for compatibility
  1565. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1566. # Dump ENG Register
  1567. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1568. # Dump MISCOUT Register
  1569. DIR,RUN,MISC_WRITE,0xef
  1570. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1571. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1572. CLK_IND, RUN, FREQ_2, 0x90
  1573. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1574. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1575. CRT,RUN,LATCH_DATA, 0x00
  1576.  
  1577. [1152,864,16,82,90]
  1578. # Unlock CRTC
  1579. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1580. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1581. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1582. # Dump CRT Controller Registers
  1583. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1584. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1585. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1586. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1587. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1588. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1589. CRT,RUN,MODE_CONTROL,0x02
  1590. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1591. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1592. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1593. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1594. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1595. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1596. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1597. # Lock CRTC Reg 11 for compatibility
  1598. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1599. # Dump ENG Register
  1600. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1601. # Dump MISCOUT Register
  1602. DIR,RUN,MISC_WRITE,0xef
  1603. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1604. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1605. CLK_IND, RUN, FREQ_2, 0xb9
  1606. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1607. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1608. CRT,RUN,LATCH_DATA, 0x00
  1609.  
  1610. [1152,864,16,71,75]
  1611. # Unlock CRTC
  1612. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1613. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1614. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1615. # Dump CRT Controller Registers
  1616. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1617. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1618. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1619. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1620. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1621. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1622. CRT,RUN,MODE_CONTROL,0x02
  1623. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1624. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1625. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1626. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1627. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1628. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1629. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1630. # Lock CRTC Reg 11 for compatibility
  1631. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1632. # Dump ENG Register
  1633. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1634. # Dump MISCOUT Register
  1635. DIR,RUN,MISC_WRITE,0xef
  1636. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1637. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1638. CLK_IND, RUN, FREQ_2, 0xa9
  1639. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1640. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1641. CRT,RUN,LATCH_DATA, 0x00
  1642.  
  1643. [1152,864,16,64,70]
  1644. # Unlock CRTC
  1645. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1646. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1647. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1648. # Dump CRT Controller Registers
  1649. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1650. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1651. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1652. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1653. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1654. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1655. CRT,RUN,MODE_CONTROL,0x02
  1656. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1657. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1658. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1659. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1660. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1661. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1662. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1663. # Lock CRTC Reg 11 for compatibility
  1664. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1665. # Dump ENG Register
  1666. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1667. # Dump MISCOUT Register
  1668. DIR,RUN,MISC_WRITE,0xef
  1669. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1670. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1671. CLK_IND, RUN, FREQ_2, 0x9b
  1672. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1673. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1674. CRT,RUN,LATCH_DATA, 0x00
  1675.  
  1676. [1152,864,16,56,60]
  1677. # Unlock CRTC
  1678. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1679. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1680. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1681. # Dump CRT Controller Registers
  1682. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1683. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1684. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1685. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1686. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1687. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1688. CRT,RUN,MODE_CONTROL,0x02
  1689. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1690. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1691. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1692. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1693. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1694. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1695. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1696. # Lock CRTC Reg 11 for compatibility
  1697. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1698. # Dump ENG Register
  1699. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1700. # Dump MISCOUT Register
  1701. DIR,RUN,MISC_WRITE,0xef
  1702. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1703. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1704. CLK_IND, RUN, FREQ_2, 0x90
  1705. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1706. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1707. CRT,RUN,LATCH_DATA, 0x00
  1708.  
  1709. [1152,864,8,82,90]
  1710. # Unlock CRTC
  1711. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1712. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1713. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1714. # Dump CRT Controller Registers
  1715. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1716. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1717. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1718. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1719. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1720. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1721. CRT,RUN,MODE_CONTROL,0x02
  1722. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1723. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1724. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1725. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1726. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1727. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1728. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1729. # Lock CRTC Reg 11 for compatibility
  1730. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1731. # Dump ENG Register
  1732. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1733. # Dump MISCOUT Register
  1734. DIR,RUN,MISC_WRITE,0xef
  1735. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1736. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1737. CLK_IND, RUN, FREQ_2, 0xb9
  1738. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1739. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1740. CRT,RUN,LATCH_DATA, 0x08
  1741.  
  1742. [1152,864,8,71,75]
  1743. # Unlock CRTC
  1744. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1745. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1746. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1747. # Dump CRT Controller Registers
  1748. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1749. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1750. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1751. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1752. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1753. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1754. CRT,RUN,MODE_CONTROL,0x02
  1755. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1756. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1757. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1758. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1759. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1760. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1761. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1762. # Lock CRTC Reg 11 for compatibility
  1763. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1764. # Dump ENG Register
  1765. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1766. # Dump MISCOUT Register
  1767. DIR,RUN,MISC_WRITE,0xef
  1768. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1769. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1770. CLK_IND, RUN, FREQ_2, 0xa9
  1771. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1772. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1773. CRT,RUN,LATCH_DATA, 0x08
  1774.  
  1775. [1152,864,8,64,70]
  1776. # Unlock CRTC
  1777. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1778. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1779. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1780. # Dump CRT Controller Registers
  1781. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1782. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1783. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1784. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1785. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1786. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1787. CRT,RUN,MODE_CONTROL,0x02
  1788. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1789. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1790. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1791. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1792. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1793. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1794. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1795. # Lock CRTC Reg 11 for compatibility
  1796. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1797. # Dump ENG Register
  1798. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1799. # Dump MISCOUT Register
  1800. DIR,RUN,MISC_WRITE,0xef
  1801. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1802. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1803. CLK_IND, RUN, FREQ_2, 0x9b
  1804. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1805. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1806. CRT,RUN,LATCH_DATA, 0x08
  1807.  
  1808. [1152,864,8,56,60]
  1809. # Unlock CRTC
  1810. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1811. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1812. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1813. # Dump CRT Controller Registers
  1814. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1815. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1816. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1817. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1818. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1819. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1820. CRT,RUN,MODE_CONTROL,0x02
  1821. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1822. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1823. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1824. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1825. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1826. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1827. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1828. # Lock CRTC Reg 11 for compatibility
  1829. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1830. # Dump ENG Register
  1831. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1832. # Dump MISCOUT Register
  1833. DIR,RUN,MISC_WRITE,0xef
  1834. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1835. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1836. CLK_IND, RUN, FREQ_2, 0x90
  1837. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1838. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1839. CRT,RUN,LATCH_DATA, 0x08
  1840.  
  1841. [1024,768,32,64,80]
  1842. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1843. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1844. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1845. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1846. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1847. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1848. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1849. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1850. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1851. CRT,RUN,MODE_CONTROL,0x02
  1852. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1853. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1854. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1855. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1856. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1857. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1858. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1859. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1860. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1861. DIR,RUN,MISC_WRITE,0x2f
  1862. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1863. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1864. CLK_IND, RUN, FREQ_2, 0x93
  1865. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1866. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1867. CRT,RUN,LATCH_DATA, 0x00
  1868.  
  1869. [1024,768,32,60,75]
  1870. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1871. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1872. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1873. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1874. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1875. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1876. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1877. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1878. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1879. CRT,RUN,MODE_CONTROL,0x02
  1880. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1881. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1882. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1883. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1884. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1885. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1886. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1887. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1888. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1889. DIR,RUN,MISC_WRITE,0x2f
  1890. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1891. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1892. CLK_IND, RUN, FREQ_2, 0x8c
  1893. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1894. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1895. CRT,RUN,LATCH_DATA, 0x00
  1896.  
  1897. [1024,768,32,58,72]
  1898. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1899. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1900. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1901. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1902. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1903. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1904. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1905. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1906. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1907. CRT,RUN,MODE_CONTROL,0x02
  1908. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1909. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1910. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1911. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1912. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1913. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1914. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1915. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1916. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1917. DIR,RUN,MISC_WRITE,0x2f
  1918. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1919. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1920. CLK_IND, RUN, FREQ_2, 0x88
  1921. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1922. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1923. CRT,RUN,LATCH_DATA, 0x00
  1924.  
  1925. [1024,768,32,56,70]
  1926. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1927. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1928. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1929. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1930. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1931. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1932. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1933. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1934. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1935. CRT,RUN,MODE_CONTROL,0x02
  1936. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1937. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1938. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1939. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1940. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1941. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1942. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1943. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1944. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1945. DIR,RUN,MISC_WRITE,0x2f
  1946. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1947. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1948. CLK_IND, RUN, FREQ_2, 0x88
  1949. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1950. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1951. CRT,RUN,LATCH_DATA, 0x00
  1952.  
  1953. [1024,768,32,48,60]
  1954. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1955. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1956. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1957. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1958. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1959. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1960. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1961. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1962. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1963. CRT,RUN,MODE_CONTROL,0x02
  1964. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1965. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  1966. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1967. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1968. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1969. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1970. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1971. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1972. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1973. DIR,RUN,MISC_WRITE,0x2f
  1974. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1975. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1976. CLK_IND, RUN, FREQ_2, 0x7e
  1977. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1978. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1979. CRT,RUN,LATCH_DATA, 0x00
  1980.  
  1981. [1024,768,24,64,80]
  1982. # Unlock CRTC
  1983. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1984. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1985. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1986. # Dump CRT Controller Registers
  1987. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x65,0x8e,0x1f,0xf5,0x00,0x60
  1988. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1989. CRT,RUN,VERT_RETRACE_START,0x00,0x0e,0xff
  1990. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1b,0xeb,0xff
  1991. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  1992. CRT,RUN,MISC_1,0x15,0x70,0x3d,0x11
  1993. CRT,RUN,MODE_CONTROL,0x02
  1994. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1995. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  1996. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1997. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1998. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1999. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2000. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2001. # Lock CRTC Reg 11 for compatibility
  2002. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2003. # Dump ENG Register
  2004. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2005. # Dump MISCOUT Register
  2006. DIR,RUN,MISC_WRITE,0xef
  2007. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2008. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2009. CLK_IND, RUN, FREQ_2, 0x93
  2010. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2011. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2012. CRT,RUN,LATCH_DATA, 0x00
  2013.  
  2014. [1024,768,24,60,75]
  2015. # Unlock CRTC
  2016. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2017. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2018. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2019. # Dump CRT Controller Registers
  2020. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x99,0x63,0x90,0x1e,0xf1,0x00,0x60
  2021. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2022. CRT,RUN,VERT_RETRACE_START,0xff,0x05,0xff
  2023. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xeb,0xff
  2024. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2025. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2026. CRT,RUN,MODE_CONTROL,0x02
  2027. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2028. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2029. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2030. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2031. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2032. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2033. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2034. # Lock CRTC Reg 11 for compatibility
  2035. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2036. # Dump ENG Register
  2037. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2038. # Dump MISCOUT Register
  2039. DIR,RUN,MISC_WRITE,0xef
  2040. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2041. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2042. CLK_IND, RUN, FREQ_2, 0x8c
  2043. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2044. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2045. CRT,RUN,LATCH_DATA, 0x00
  2046.  
  2047. [1024,768,24,58,72]
  2048. # Unlock CRTC
  2049. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2050. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2051. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2052. # Dump CRT Controller Registers
  2053. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x9a,0x61,0x8a,0x19,0xf5,0x00,0x60
  2054. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2055. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2056. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x11,0xeb,0xff
  2057. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2058. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2059. CRT,RUN,MODE_CONTROL,0x02
  2060. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2061. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2062. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2063. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2064. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2065. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2066. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2067. # Lock CRTC Reg 11 for compatibility
  2068. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2069. # Dump ENG Register
  2070. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2071. # Dump MISCOUT Register
  2072. DIR,RUN,MISC_WRITE,0xef
  2073. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2074. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2075. CLK_IND, RUN, FREQ_2, 0x88
  2076. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2077. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2078. CRT,RUN,LATCH_DATA, 0x00
  2079.  
  2080. [1024,768,24,56,70]
  2081. # Unlock CRTC
  2082. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2083. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2084. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2085. # Dump CRT Controller Registers
  2086. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x1b,0x62,0x8f,0x2a,0xf5,0x00,0x60
  2087. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2088. CRT,RUN,VERT_RETRACE_START,0x03,0x09,0xff
  2089. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x2a,0xeb,0xff
  2090. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2091. CRT,RUN,MISC_1,0x15,0x71,0x21,0x11
  2092. CRT,RUN,MODE_CONTROL,0x02
  2093. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2094. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2095. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2096. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2097. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2098. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2099. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2100. # Lock CRTC Reg 11 for compatibility
  2101. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2102. # Dump ENG Register
  2103. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2104. # Dump MISCOUT Register
  2105. DIR,RUN,MISC_WRITE,0xef
  2106. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2107. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2108. CLK_IND, RUN, FREQ_2, 0x88
  2109. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2110. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2111. CRT,RUN,LATCH_DATA, 0x00
  2112.  
  2113. [1024,768,24,48,60]
  2114. # Unlock CRTC
  2115. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2116. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2117. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2118. # Dump CRT Controller Registers
  2119. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x62,0x8f,0x24,0xf5,0x00,0x60
  2120. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2121. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2122. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xeb,0xff
  2123. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2124. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2125. CRT,RUN,MODE_CONTROL,0x02
  2126. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2127. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2128. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2129. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2130. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2131. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2132. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2133. # Lock CRTC Reg 11 for compatibility
  2134. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2135. # Dump ENG Register
  2136. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2137. # Dump MISCOUT Register
  2138. DIR,RUN,MISC_WRITE,0xef
  2139. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2140. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2141. CLK_IND, RUN, FREQ_2, 0x7e
  2142. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2143. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2144. CRT,RUN,LATCH_DATA, 0x00
  2145.  
  2146. [1024,768,16,96,120]
  2147. # Unlock CRTC
  2148. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2149. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2150. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2151. # Dump CRT Controller Registers
  2152. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2153. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2154. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2155. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2156. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2157. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2158. CRT,RUN,MODE_CONTROL,0x02
  2159. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2160. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2161. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2162. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2163. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2164. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2165. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2166. # Lock CRTC Reg 11 for compatibility
  2167. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2168. # Dump ENG Register
  2169. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2170. # Dump MISCOUT Register
  2171. DIR,RUN,MISC_WRITE,0xef
  2172. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2173. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2174. CLK_IND, RUN, FREQ_2, 0xbd
  2175. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2176. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2177. CRT,RUN,LATCH_DATA, 0x00
  2178.  
  2179. [1024,768,16,81,100]
  2180. # Unlock CRTC
  2181. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2182. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2183. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2184. # Dump CRT Controller Registers
  2185. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2186. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2187. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2188. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2189. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2190. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2191. CRT,RUN,MODE_CONTROL,0x02
  2192. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2193. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2194. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2195. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2196. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2197. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2198. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2199. # Lock CRTC Reg 11 for compatibility
  2200. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2201. # Dump ENG Register
  2202. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2203. # Dump MISCOUT Register
  2204. DIR,RUN,MISC_WRITE,0xef
  2205. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2206. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2207. CLK_IND, RUN, FREQ_2, 0xa9
  2208. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2209. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2210. CRT,RUN,LATCH_DATA, 0x00
  2211.  
  2212. [1024,768,16,64,80]
  2213. # Unlock CRTC
  2214. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2215. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2216. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2217. # Dump CRT Controller Registers
  2218. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2219. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2220. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2221. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2222. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2223. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2224. CRT,RUN,MODE_CONTROL,0x02
  2225. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2226. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2227. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2228. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2229. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2230. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2231. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2232. # Lock CRTC Reg 11 for compatibility
  2233. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2234. # Dump ENG Register
  2235. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2236. # Dump MISCOUT Register
  2237. DIR,RUN,MISC_WRITE,0xef
  2238. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2239. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2240. CLK_IND, RUN, FREQ_2, 0x93
  2241. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2242. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2243. CRT,RUN,LATCH_DATA, 0x00
  2244.  
  2245. [1024,768,16,60,75]
  2246. # Unlock CRTC
  2247. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2248. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2249. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2250. # Dump CRT Controller Registers
  2251. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2252. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2253. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2254. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2255. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2256. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2257. CRT,RUN,MODE_CONTROL,0x02
  2258. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2259. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2260. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2261. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2262. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2263. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2264. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2265. # Lock CRTC Reg 11 for compatibility
  2266. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2267. # Dump ENG Register
  2268. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2269. # Dump MISCOUT Register
  2270. DIR,RUN,MISC_WRITE,0xef
  2271. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2272. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2273. CLK_IND, RUN, FREQ_2, 0x8c
  2274. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2275. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2276. CRT,RUN,LATCH_DATA, 0x00
  2277.  
  2278. [1024,768,16,58,72]
  2279. # Unlock CRTC
  2280. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2281. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2282. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2283. # Dump CRT Controller Registers
  2284. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2285. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2286. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2287. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2288. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2289. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  2290. CRT,RUN,MODE_CONTROL,0x02
  2291. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2292. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2293. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2294. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2295. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2296. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2297. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2298. # Lock CRTC Reg 11 for compatibility
  2299. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2300. # Dump ENG Register
  2301. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2302. # Dump MISCOUT Register
  2303. DIR,RUN,MISC_WRITE,0xef
  2304. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2305. CLK_IND, RUN, FREQ_2,0x88
  2306. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2307. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2308. CLK_IND, RUN, FREQ_2, 0x88
  2309. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2310. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2311. CRT,RUN,LATCH_DATA, 0x00
  2312.  
  2313. [1024,768,16,56,70]
  2314. # Unlock CRTC
  2315. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2316. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2317. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2318. # Dump CRT Controller Registers
  2319. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2320. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2321. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2322. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2323. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2324. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2325. CRT,RUN,MODE_CONTROL,0x02
  2326. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2327. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2328. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2329. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2330. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2331. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2332. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2333. # Lock CRTC Reg 11 for compatibility
  2334. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2335. # Dump ENG Register
  2336. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2337. # Dump MISCOUT Register
  2338. DIR,RUN,MISC_WRITE,0xef
  2339. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2340. CLK_IND, RUN, FREQ_2,0x88
  2341. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2342. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2343. CLK_IND, RUN, FREQ_2, 0x88
  2344. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2345. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2346. CRT,RUN,LATCH_DATA, 0x00
  2347.  
  2348. [1024,768,16,48,60]
  2349. # Unlock CRTC
  2350. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2351. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2352. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2353. # Dump CRT Controller Registers
  2354. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2355. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2356. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2357. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2358. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2359. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  2360. CRT,RUN,MODE_CONTROL,0x02
  2361. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2362. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2363. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2364. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2365. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2366. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2367. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2368. # Lock CRTC Reg 11 for compatibility
  2369. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2370. # Dump ENG Register
  2371. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2372. # Dump MISCOUT Register
  2373. DIR,RUN,MISC_WRITE,0xef
  2374. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2375. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2376. CLK_IND, RUN, FREQ_2, 0x7E
  2377. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2378. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2379. CRT,RUN,LATCH_DATA, 0x00
  2380.  
  2381. [1024,768,8,96,120]
  2382. # Unlock CRTC
  2383. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2384. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2385. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2386. # Dump CRT Controller Registers
  2387. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2388. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2389. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2390. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2391. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2392. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2393. CRT,RUN,MODE_CONTROL,0x02
  2394. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2395. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2396. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2397. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2398. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2399. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2400. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2401. # Lock CRTC Reg 11 for compatibility
  2402. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2403. # Dump ENG Register
  2404. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2405. # Dump MISCOUT Register
  2406. DIR,RUN,MISC_WRITE,0xef
  2407. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2408. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2409. CLK_IND, RUN, FREQ_2, 0xbd
  2410. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2411. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2412. CRT,RUN,LATCH_DATA, 0x08
  2413.  
  2414. [1024,768,8,81,100]
  2415. # Unlock CRTC
  2416. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2417. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2418. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2419. # Dump CRT Controller Registers
  2420. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2421. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2422. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2423. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2424. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2425. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2426. CRT,RUN,MODE_CONTROL,0x02
  2427. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2428. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2429. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2430. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2431. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2432. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2433. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2434. # Lock CRTC Reg 11 for compatibility
  2435. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2436. # Dump ENG Register
  2437. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2438. # Dump MISCOUT Register
  2439. DIR,RUN,MISC_WRITE,0xef
  2440. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2441. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2442. CLK_IND, RUN, FREQ_2, 0xa9
  2443. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2444. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2445. CRT,RUN,LATCH_DATA, 0x08
  2446.  
  2447. [1024,768,8,64,80]
  2448. # Unlock CRTC
  2449. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2450. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2451. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2452. # Dump CRT Controller Registers
  2453. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2454. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2455. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2456. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2457. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2458. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2459. CRT,RUN,MODE_CONTROL,0x02
  2460. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2461. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2462. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2463. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2464. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2465. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2466. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2467. # Lock CRTC Reg 11 for compatibility
  2468. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2469. # Dump ENG Register
  2470. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2471. # Dump MISCOUT Register
  2472. DIR,RUN,MISC_WRITE,0xef
  2473. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2474. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2475. CLK_IND, RUN, FREQ_2, 0x93
  2476. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2477. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2478. CRT,RUN,LATCH_DATA, 0x08
  2479.  
  2480. [1024,768,8,60,75]
  2481. # Unlock CRTC
  2482. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2483. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2484. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2485. # Dump CRT Controller Registers
  2486. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2487. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2488. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2489. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2490. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2491. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2492. CRT,RUN,MODE_CONTROL,0x02
  2493. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2494. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2495. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2496. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2497. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2498. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2499. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2500. # Lock CRTC Reg 11 for compatibility
  2501. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2502. # Dump ENG Register
  2503. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2504. # Dump MISCOUT Register
  2505. DIR,RUN,MISC_WRITE,0xef
  2506. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2507. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2508. CLK_IND, RUN, FREQ_2, 0x8c
  2509. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2510. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2511. CRT,RUN,LATCH_DATA, 0x08
  2512.  
  2513. [1024,768,8,58,72]
  2514. # Unlock CRTC
  2515. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2516. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2517. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2518. # Dump CRT Controller Registers
  2519. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2520. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2521. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2522. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2523. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2524. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2525. CRT,RUN,MODE_CONTROL,0x02
  2526. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2527. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2528. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2529. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2530. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2531. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2532. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2533. # Lock CRTC Reg 11 for compatibility
  2534. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2535. # Dump ENG Register
  2536. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2537. # Dump MISCOUT Register
  2538. DIR,RUN,MISC_WRITE,0xef
  2539. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2540. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2541. CLK_IND, RUN, FREQ_2, 0x88
  2542. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2543. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2544. CRT,RUN,LATCH_DATA, 0x08
  2545.  
  2546. [1024,768,8,56,70]
  2547. # Unlock CRTC
  2548. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2549. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2550. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2551. # Dump CRT Controller Registers
  2552. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2553. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2554. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2555. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2556. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2557. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2558. CRT,RUN,MODE_CONTROL,0x02
  2559. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2560. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2561. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2562. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2563. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2564. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2565. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2566. # Lock CRTC Reg 11 for compatibility
  2567. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2568. # Dump ENG Register
  2569. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2570. # Dump MISCOUT Register
  2571. DIR,RUN,MISC_WRITE,0xef
  2572. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2573. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2574. CLK_IND, RUN, FREQ_2, 0x88
  2575. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2576. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2577. CRT,RUN,LATCH_DATA, 0x08
  2578.  
  2579. [1024,768,8,48,60]
  2580. # Unlock CRTC
  2581. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2582. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2583. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2584. # Dump CRT Controller Registers
  2585. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2586. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2587. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2588. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2589. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2590. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2591. CRT,RUN,MODE_CONTROL,0x02
  2592. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2593. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  2594. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2595. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2596. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2597. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2598. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2599. # Lock CRTC Reg 11 for compatibility
  2600. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2601. # Dump ENG Register
  2602. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2603. # Dump MISCOUT Register
  2604. DIR,RUN,MISC_WRITE,0xef
  2605. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2606. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2607. CLK_IND, RUN, FREQ_2, 0x7e
  2608. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2609. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2610. CRT,RUN,LATCH_DATA, 0x08
  2611.  
  2612. [800,600,32,75,120]
  2613. # Unlock CRTC
  2614. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2615. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2616. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2617. # Dump CRT Controller Registers
  2618. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2619. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2620. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2621. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2622. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2623. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2624. CRT,RUN,MODE_CONTROL,0x02
  2625. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2626. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2627. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2628. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2629. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2630. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2631. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2632. # Lock CRTC Reg 11 for compatibility
  2633. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2634. # Dump ENG Register
  2635. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2636. # Dump MISCOUT Register
  2637. DIR,RUN,MISC_WRITE,0xef
  2638. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2639. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2640. CLK_IND, RUN, FREQ_2, 0x8a
  2641. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2642. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2643. CRT,RUN,LATCH_DATA, 0x00
  2644.  
  2645. [800,600,32,64,100]
  2646. # Unlock CRTC
  2647. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2648. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2649. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2650. # Dump CRT Controller Registers
  2651. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2652. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2653. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2654. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2655. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2656. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2657. CRT,RUN,MODE_CONTROL,0x02
  2658. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2659. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2660. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2661. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2662. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2663. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2664. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2665. # Lock CRTC Reg 11 for compatibility
  2666. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2667. # Dump ENG Register
  2668. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2669. # Dump MISCOUT Register
  2670. DIR,RUN,MISC_WRITE,0xef
  2671. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2672. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2673. CLK_IND, RUN, FREQ_2, 0x7e
  2674. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2675. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2676. CRT,RUN,LATCH_DATA, 0x00
  2677.  
  2678. [800,600,32,56,90]
  2679. # Unlock CRTC
  2680. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2681. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2682. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2683. # Dump CRT Controller Registers
  2684. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2685. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2686. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2687. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2688. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2689. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2690. CRT,RUN,MODE_CONTROL,0x02
  2691. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2692. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2693. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2694. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2695. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2696. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2697. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2698. # Lock CRTC Reg 11 for compatibility
  2699. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2700. # Dump ENG Register
  2701. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2702. # Dump MISCOUT Register
  2703. DIR,RUN,MISC_WRITE,0xef
  2704. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2705. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2706. CLK_IND, RUN, FREQ_2, 0x70
  2707. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2708. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2709. CRT,RUN,LATCH_DATA, 0x00
  2710.  
  2711. [800,600,32,46,75]
  2712. # Unlock CRTC
  2713. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2714. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2715. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2716. # Dump CRT Controller Registers
  2717. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2718. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2719. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2720. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2721. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2722. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2723. CRT,RUN,MODE_CONTROL,0x02
  2724. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2725. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2726. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2727. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2728. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2729. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2730. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2731. # Lock CRTC Reg 11 for compatibility
  2732. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2733. # Dump ENG Register
  2734. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2735. # Dump MISCOUT Register
  2736. DIR,RUN,MISC_WRITE,0xef
  2737. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2738. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2739. CLK_IND, RUN, FREQ_2, 0x60
  2740. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2741. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2742. CRT,RUN,LATCH_DATA, 0x00
  2743.  
  2744. [800,600,32,48,72]
  2745. # Unlock CRTC
  2746. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2747. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2748. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2749. # Dump CRT Controller Registers
  2750. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2751. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2752. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2753. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2754. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2755. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2756. CRT,RUN,MODE_CONTROL,0x02
  2757. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2758. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2759. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2760. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2761. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2762. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2763. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2764. # Lock CRTC Reg 11 for compatibility
  2765. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2766. # Dump ENG Register
  2767. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2768. # Dump MISCOUT Register
  2769. DIR,RUN,MISC_WRITE,0xef
  2770. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2771. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2772. CLK_IND, RUN, FREQ_2, 0x61
  2773. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2774. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2775. CRT,RUN,LATCH_DATA, 0x00
  2776.  
  2777. [800,600,32,35,56]
  2778. # Unlock CRTC
  2779. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2780. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2781. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2782. # Dump CRT Controller Registers
  2783. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2784. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2785. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2786. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2787. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2788. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2789. CRT,RUN,MODE_CONTROL,0x02
  2790. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2791. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2792. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2793. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2794. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2795. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2796. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2797. # Lock CRTC Reg 11 for compatibility
  2798. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2799. # Dump ENG Register
  2800. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2801. # Dump MISCOUT Register
  2802. DIR,RUN,MISC_WRITE,0xef
  2803. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2804. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2805. CLK_IND, RUN, FREQ_2, 0x45
  2806. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2807. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2808. CRT,RUN,LATCH_DATA, 0x00
  2809.  
  2810. [800,600,32,37,60]
  2811. # Unlock CRTC
  2812. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2813. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2814. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2815. # Dump CRT Controller Registers
  2816. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2817. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2818. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2819. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2820. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2821. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2822. CRT,RUN,MODE_CONTROL,0x02
  2823. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2824. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2825. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2826. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2827. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2828. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2829. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2830. # Lock CRTC Reg 11 for compatibility
  2831. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2832. # Dump ENG Register
  2833. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2834. # Dump MISCOUT Register
  2835. DIR,RUN,MISC_WRITE,0xef
  2836. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2837. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2838. CLK_IND, RUN, FREQ_2, 0x4D
  2839. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2840. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2841. CRT,RUN,LATCH_DATA, 0x00
  2842.  
  2843. [800,600,24,75,120]
  2844. # Unlock CRTC
  2845. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2846. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2847. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2848. # Dump CRT Controller Registers
  2849. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  2850. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2851. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  2852. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2853. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2854. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2855. CRT,RUN,MODE_CONTROL,0x02
  2856. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2857. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2858. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2859. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2860. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2861. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2862. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2863. # Lock CRTC Reg 11 for compatibility
  2864. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2865. # Dump ENG Register
  2866. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2867. # Dump MISCOUT Register
  2868. DIR,RUN,MISC_WRITE,0xef
  2869. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2870. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2871. CLK_IND, RUN, FREQ_2, 0x8a
  2872. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2873. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2874. CRT,RUN,LATCH_DATA, 0x00
  2875.  
  2876.  
  2877. [800,600,24,64,100]
  2878. # Unlock CRTC
  2879. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2880. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2881. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2882. # Dump CRT Controller Registers
  2883. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x7a,0xf0,0x00,0x60
  2884. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2885. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  2886. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2887. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2888. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2889. CRT,RUN,MODE_CONTROL,0x02
  2890. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2891. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2892. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2893. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2894. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2895. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2896. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2897. # Lock CRTC Reg 11 for compatibility
  2898. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2899. # Dump ENG Register
  2900. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2901. # Dump MISCOUT Register
  2902. DIR,RUN,MISC_WRITE,0xef
  2903. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2904. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2905. CLK_IND, RUN, FREQ_2, 0x7e
  2906. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2907. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2908. CRT,RUN,LATCH_DATA, 0x00
  2909.  
  2910.  
  2911. [800,600,24,56,90]
  2912. # Unlock CRTC
  2913. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2914. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2915. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2916. # Dump CRT Controller Registers
  2917. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x1b,0x6f,0xf0,0x00,0x60
  2918. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2919. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  2920. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2921. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2922. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  2923. CRT,RUN,MODE_CONTROL,0x02
  2924. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2925. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2926. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2927. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2928. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2929. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2930. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2931. # Lock CRTC Reg 11 for compatibility
  2932. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2933. # Dump ENG Register
  2934. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2935. # Dump MISCOUT Register
  2936. DIR,RUN,MISC_WRITE,0xef
  2937. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2938. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2939. CLK_IND, RUN, FREQ_2, 0x70
  2940. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2941. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2942. CRT,RUN,LATCH_DATA, 0x00
  2943.  
  2944.  
  2945. [800,600,24,46,75]
  2946. # Unlock CRTC
  2947. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2948. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2949. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2950. # Dump CRT Controller Registers
  2951. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x52,0x1a,0x6f,0xe0,0x00,0x60
  2952. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2953. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2954. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2955. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2956. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2957. CRT,RUN,MODE_CONTROL,0x02
  2958. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2959. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2960. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2961. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2962. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2963. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2964. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2965. # Lock CRTC Reg 11 for compatibility
  2966. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2967. # Dump ENG Register
  2968. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2969. # Dump MISCOUT Register
  2970. DIR,RUN,MISC_WRITE,0xef
  2971. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2972. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2973. CLK_IND, RUN, FREQ_2, 0x60
  2974. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2975. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2976. CRT,RUN,LATCH_DATA, 0x00
  2977.  
  2978.  
  2979. [800,600,24,48,72]
  2980. # Unlock CRTC
  2981. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2982. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2983. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2984. # Dump CRT Controller Registers
  2985. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x8e,0xf0,0x00,0x60
  2986. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2987. CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  2988. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2989. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2990. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2991. CRT,RUN,MODE_CONTROL,0x02
  2992. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2993. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  2994. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2995. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2996. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2997. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2998. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2999. # Lock CRTC Reg 11 for compatibility
  3000. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3001. # Dump ENG Register
  3002. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3003. # Dump MISCOUT Register
  3004. DIR,RUN,MISC_WRITE,0xef
  3005. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3006. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3007. CLK_IND, RUN, FREQ_2, 0x61
  3008. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3009. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3010. CRT,RUN,LATCH_DATA, 0x00
  3011.  
  3012. [800,600,24,37,60]
  3013. # Unlock CRTC
  3014. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3015. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3016. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3017. # Dump CRT Controller Registers
  3018. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x72,0xf0,0x00,0x60
  3019. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3020. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3021. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3022. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3023. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3024. CRT,RUN,MODE_CONTROL,0x02
  3025. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3026. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  3027. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3028. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3029. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3030. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3031. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3032. # Lock CRTC Reg 11 for compatibility
  3033. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3034. # Dump ENG Register
  3035. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3036. # Dump MISCOUT Register
  3037. DIR,RUN,MISC_WRITE,0xef
  3038. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3039. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3040. CLK_IND, RUN, FREQ_2, 0x4d
  3041. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3042. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3043. CRT,RUN,LATCH_DATA, 0x00
  3044.  
  3045.  
  3046. [800,600,24,35,56]
  3047. # Unlock CRTC
  3048. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3049. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3050. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3051. # Dump CRT Controller Registers
  3052. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x18,0x72,0xf0,0x00,0x60
  3053. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3054. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3055. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3056. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3057. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3058. CRT,RUN,MODE_CONTROL,0x02
  3059. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3060. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  3061. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3062. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3063. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3064. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3065. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3066. # Lock CRTC Reg 11 for compatibility
  3067. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3068. # Dump ENG Register
  3069. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3070. # Dump MISCOUT Register
  3071. DIR,RUN,MISC_WRITE,0xef
  3072. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3073. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3074. CLK_IND, RUN, FREQ_2, 0x45
  3075. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3076. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3077. CRT,RUN,LATCH_DATA, 0x00
  3078.  
  3079.  
  3080.  
  3081. [800,600,16,75,120]
  3082. # Unlock CRTC
  3083. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3084. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3085. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3086. # Dump CRT Controller Registers
  3087. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3088. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3089. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3090. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3091. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3092. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3093. CRT,RUN,MODE_CONTROL,0x02
  3094. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3095. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3096. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3097. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3098. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3099. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3100. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3101. # Lock CRTC Reg 11 for compatibility
  3102. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3103. # Dump ENG Register
  3104. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3105. # Dump MISCOUT Register
  3106. DIR,RUN,MISC_WRITE,0xef
  3107. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3108. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3109. CLK_IND, RUN, FREQ_2, 0x8a
  3110. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3111. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3112. CRT,RUN,LATCH_DATA, 0x00
  3113.  
  3114. [800,600,16,64,100]
  3115. # Unlock CRTC
  3116. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3117. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3118. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3119. # Dump CRT Controller Registers
  3120. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3121. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3122. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3123. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3124. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3125. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3126. CRT,RUN,MODE_CONTROL,0x02
  3127. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3128. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3129. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3130. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3131. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3132. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3133. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3134. # Lock CRTC Reg 11 for compatibility
  3135. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3136. # Dump ENG Register
  3137. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3138. # Dump MISCOUT Register
  3139. DIR,RUN,MISC_WRITE,0xef
  3140. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3141. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3142. CLK_IND, RUN, FREQ_2, 0x7e
  3143. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3144. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3145. CRT,RUN,LATCH_DATA, 0x00
  3146.  
  3147. [800,600,16,56,90]
  3148. # Unlock CRTC
  3149. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3150. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3151. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3152. # Dump CRT Controller Registers
  3153. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3154. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3155. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3156. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3157. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3158. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3159. CRT,RUN,MODE_CONTROL,0x02
  3160. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3161. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3162. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3163. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3164. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3165. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3166. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3167. # Lock CRTC Reg 11 for compatibility
  3168. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3169. # Dump ENG Register
  3170. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3171. # Dump MISCOUT Register
  3172. DIR,RUN,MISC_WRITE,0xef
  3173. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3174. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3175. CLK_IND, RUN, FREQ_2, 0x70
  3176. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3177. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3178. CRT,RUN,LATCH_DATA, 0x00
  3179.  
  3180. [800,600,16,46,75]
  3181. # Unlock CRTC
  3182. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3183. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3184. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3185. # Dump CRT Controller Registers
  3186. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3187. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3188. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3189. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3190. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3191. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3192. CRT,RUN,MODE_CONTROL,0x02
  3193. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3194. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3195. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3196. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3197. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3198. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3199. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3200. # Lock CRTC Reg 11 for compatibility
  3201. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3202. # Dump ENG Register
  3203. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3204. # Dump MISCOUT Register
  3205. DIR,RUN,MISC_WRITE,0xef
  3206. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3207. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3208. CLK_IND, RUN, FREQ_2, 0x60
  3209. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3210. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3211. CRT,RUN,LATCH_DATA, 0x00
  3212.  
  3213. [800,600,16,48,72]
  3214. # Unlock CRTC
  3215. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3216. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3217. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3218. # Dump CRT Controller Registers
  3219. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3220. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3221. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3222. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3223. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3224. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3225. CRT,RUN,MODE_CONTROL,0x02
  3226. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3227. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3228. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3229. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3230. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3231. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3232. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3233. # Lock CRTC Reg 11 for compatibility
  3234. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3235. # Dump ENG Register
  3236. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3237. # Dump MISCOUT Register
  3238. DIR,RUN,MISC_WRITE,0xef
  3239. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3240. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3241. CLK_IND, RUN, FREQ_2, 0x61
  3242. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3243. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3244. CRT,RUN,LATCH_DATA, 0x00
  3245.  
  3246. [800,600,16,35,56]
  3247. # Unlock CRTC
  3248. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3249. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3250. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3251. # Dump CRT Controller Registers
  3252. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3253. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3254. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3255. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3256. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3257. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3258. CRT,RUN,MODE_CONTROL,0x02
  3259. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3260. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3261. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3262. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3263. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3264. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3265. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3266. # Lock CRTC Reg 11 for compatibility
  3267. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3268. # Dump ENG Register
  3269. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3270. # Dump MISCOUT Register
  3271. DIR,RUN,MISC_WRITE,0xef
  3272. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3273. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3274. CLK_IND, RUN, FREQ_2, 0x45
  3275. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3276. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3277. CRT,RUN,LATCH_DATA, 0x00
  3278.  
  3279. [800,600,16,37,60]
  3280. # Unlock CRTC
  3281. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3282. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3283. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3284. # Dump CRT Controller Registers
  3285. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3286. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3287. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3288. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3289. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3290. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3291. CRT,RUN,MODE_CONTROL,0x02
  3292. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3293. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3294. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3295. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3296. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3297. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3298. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3299. # Lock CRTC Reg 11 for compatibility
  3300. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3301. # Dump ENG Register
  3302. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3303. # Dump MISCOUT Register
  3304. DIR,RUN,MISC_WRITE,0xef
  3305. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3306. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3307. CLK_IND, RUN, FREQ_2, 0x4D
  3308. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3309. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3310. CRT,RUN,LATCH_DATA, 0x00
  3311.  
  3312. [800,600,8,75,120]
  3313. # Unlock CRTC
  3314. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3315. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3316. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3317. # Dump CRT Controller Registers
  3318. CRT,RUN,HORZ_TOTAL,0x39,0x31,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3319. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3320. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3321. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3322. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3323. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3324. CRT,RUN,MODE_CONTROL,0x02
  3325. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3326. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3327. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3328. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3329. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3330. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3331. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3332. # Lock CRTC Reg 11 for compatibility
  3333. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3334. # Dump ENG Register
  3335. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3336. # Dump MISCOUT Register
  3337. DIR,RUN,MISC_WRITE,0xef
  3338. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3339. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3340. CLK_IND, RUN, FREQ_2, 0x8a
  3341. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3342. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3343. CRT,RUN,LATCH_DATA, 0x08
  3344.  
  3345. [800,600,8,64,100]
  3346. # Unlock CRTC
  3347. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3348. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3349. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3350. # Dump CRT Controller Registers
  3351. CRT,RUN,HORZ_TOTAL,0x3a,0x31,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3352. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3353. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3354. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3355. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3356. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3357. CRT,RUN,MODE_CONTROL,0x02
  3358. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3359. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3360. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3361. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3362. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3363. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3364. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3365. # Lock CRTC Reg 11 for compatibility
  3366. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3367. # Dump ENG Register
  3368. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3369. # Dump MISCOUT Register
  3370. DIR,RUN,MISC_WRITE,0xef
  3371. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3372. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3373. CLK_IND, RUN, FREQ_2, 0x7e
  3374. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3375. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3376. CRT,RUN,LATCH_DATA, 0x08
  3377.  
  3378. [800,600,8,56,90]
  3379. # Unlock CRTC
  3380. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3381. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3382. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3383. # Dump CRT Controller Registers
  3384. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3385. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3386. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3387. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3388. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3389. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3390. CRT,RUN,MODE_CONTROL,0x02
  3391. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3392. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3393. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3394. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3395. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3396. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3397. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3398. # Lock CRTC Reg 11 for compatibility
  3399. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3400. # Dump ENG Register
  3401. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3402. # Dump MISCOUT Register
  3403. DIR,RUN,MISC_WRITE,0xef
  3404. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3405. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3406. CLK_IND, RUN, FREQ_2, 0x70
  3407. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3408. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3409. CRT,RUN,LATCH_DATA, 0x08
  3410.  
  3411. [800,600,8,46,75]
  3412. # Unlock CRTC
  3413. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3414. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3415. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3416. # Dump CRT Controller Registers
  3417. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3418. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3419. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3420. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3421. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3422. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3423. CRT,RUN,MODE_CONTROL,0x02
  3424. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3425. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3426. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3427. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3428. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3429. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3430. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3431. # Lock CRTC Reg 11 for compatibility
  3432. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3433. # Dump ENG Register
  3434. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3435. # Dump MISCOUT Register
  3436. DIR,RUN,MISC_WRITE,0xef
  3437. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3438. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3439. CLK_IND, RUN, FREQ_2, 0x60
  3440. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3441. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3442. CRT,RUN,LATCH_DATA, 0x08
  3443.  
  3444. [800,600,8,48,72]
  3445. # Unlock CRTC
  3446. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3447. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3448. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3449. # Dump CRT Controller Registers
  3450. CRT,RUN,HORZ_TOTAL,0x3c,0x31,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3451. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3452. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3453. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3454. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3455. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3456. CRT,RUN,MODE_CONTROL,0x02
  3457. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3458. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3459. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3460. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3461. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3462. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3463. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3464. # Lock CRTC Reg 11 for compatibility
  3465. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3466. # Dump ENG Register
  3467. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3468. # Dump MISCOUT Register
  3469. DIR,RUN,MISC_WRITE,0xef
  3470. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3471. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3472. CLK_IND, RUN, FREQ_2, 0x61
  3473. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3474. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3475. CRT,RUN,LATCH_DATA, 0x08
  3476.  
  3477. [800,600,8,37,60]
  3478. # Unlock CRTC
  3479. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3480. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3481. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3482. # Dump CRT Controller Registers
  3483. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3484. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3485. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3486. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3487. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3488. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3489. CRT,RUN,MODE_CONTROL,0x02
  3490. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3491. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3492. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3493. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3494. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3495. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3496. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3497. # Lock CRTC Reg 11 for compatibility
  3498. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3499. # Dump ENG Register
  3500. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3501. # Dump MISCOUT Register
  3502. DIR,RUN,MISC_WRITE,0xef
  3503. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3504. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3505. CLK_IND, RUN, FREQ_2, 0x4D
  3506. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3507. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3508. CRT,RUN,LATCH_DATA, 0x08
  3509.  
  3510. [800,600,8,35,56]
  3511. # Unlock CRTC
  3512. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3513. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3514. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3515. # Dump CRT Controller Registers
  3516. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3517. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3518. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3519. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3520. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3521. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3522. CRT,RUN,MODE_CONTROL,0x02
  3523. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3524. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3525. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3526. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3527. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3528. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3529. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3530. # Lock CRTC Reg 11 for compatibility
  3531. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3532. # Dump ENG Register
  3533. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3534. # Dump MISCOUT Register
  3535. DIR,RUN,MISC_WRITE,0xef
  3536. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3537. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3538. CLK_IND, RUN, FREQ_2, 0x45
  3539. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3540. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3541. CRT,RUN,LATCH_DATA, 0x08
  3542.  
  3543. [640,480,32,64,120]
  3544. # Unlock CRTC
  3545. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3546. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3547. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3548. # Dump CRT Controller Registers
  3549. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3550. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3551. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3552. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3553. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3554. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3555. CRT,RUN,MODE_CONTROL,0x02
  3556. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3557. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3558. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3559. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3560. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3561. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3562. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3563. # Lock CRTC Reg 11 for compatibility
  3564. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3565. # Dump ENG Register
  3566. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3567. # Dump MISCOUT Register
  3568. DIR,RUN,MISC_WRITE,0xef
  3569. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3570. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3571. CLK_IND, RUN, FREQ_2, 0x67
  3572. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3573. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3574. CRT,RUN,LATCH_DATA, 0x00
  3575.  
  3576. [640,480,32,52,100]
  3577. # Unlock CRTC
  3578. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3579. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3580. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3581. # Dump CRT Controller Registers
  3582. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3583. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3584. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3585. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3586. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3587. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3588. CRT,RUN,MODE_CONTROL,0x02
  3589. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3590. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3591. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3592. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3593. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3594. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3595. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3596. # Lock CRTC Reg 11 for compatibility
  3597. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3598. # Dump ENG Register
  3599. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3600. # Dump MISCOUT Register
  3601. DIR,RUN,MISC_WRITE,0xef
  3602. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3603. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3604. CLK_IND, RUN, FREQ_2, 0x50
  3605. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3606. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3607. CRT,RUN,LATCH_DATA, 0x00
  3608.  
  3609. [640,480,32,48,90]
  3610. # Unlock CRTC
  3611. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3612. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3613. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3614. # Dump CRT Controller Registers
  3615. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3616. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3617. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3618. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3619. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3620. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3621. CRT,RUN,MODE_CONTROL,0x02
  3622. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3623. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3624. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3625. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3626. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3627. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3628. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3629. # Lock CRTC Reg 11 for compatibility
  3630. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3631. # Dump ENG Register
  3632. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3633. # Dump MISCOUT Register
  3634. DIR,RUN,MISC_WRITE,0xef
  3635. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3636. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3637. CLK_IND, RUN, FREQ_2, 0x4d
  3638. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3639. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3640. CRT,RUN,LATCH_DATA, 0x00
  3641.  
  3642. [640,480,32,37,75]
  3643. # Unlock CRTC
  3644. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3645. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3646. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3647. # Dump CRT Controller Registers
  3648. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3649. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3650. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3651. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3652. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3653. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3654. CRT,RUN,MODE_CONTROL,0x02
  3655. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3656. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3657. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3658. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3659. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3660. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3661. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3662. # Lock CRTC Reg 11 for compatibility
  3663. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3664. # Dump ENG Register
  3665. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3666. # Dump MISCOUT Register
  3667. DIR,RUN,MISC_WRITE,0xef
  3668. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3669. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3670. CLK_IND, RUN, FREQ_2, 0x3a
  3671. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3672. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3673. CRT,RUN,LATCH_DATA, 0x00
  3674.  
  3675. [640,480,32,37,72]
  3676. # Unlock CRTC
  3677. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3678. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3679. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3680. # Dump CRT Controller Registers
  3681. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3682. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3683. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3684. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3685. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3686. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3687. CRT,RUN,MODE_CONTROL,0x02
  3688. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3689. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3690. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3691. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3692. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3693. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3694. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3695. # Lock CRTC Reg 11 for compatibility
  3696. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3697. # Dump ENG Register
  3698. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3699. # Dump MISCOUT Register
  3700. DIR,RUN,MISC_WRITE,0xef
  3701. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3702. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3703. CLK_IND, RUN, FREQ_2, 0x3a
  3704. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3705. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3706. CRT,RUN,LATCH_DATA, 0x00
  3707.  
  3708. [640,480,32,31,60]
  3709. # Unlock CRTC
  3710. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3711. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3712. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3713. # Dump CRT Controller Registers
  3714. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3715. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3716. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3717. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3718. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3719. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3720. CRT,RUN,MODE_CONTROL,0x02
  3721. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3722. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3723. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3724. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3725. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3726. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3727. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3728. # Lock CRTC Reg 11 for compatibility
  3729. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3730. # Dump ENG Register
  3731. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3732. # Dump MISCOUT Register
  3733. DIR,RUN,MISC_WRITE,0xef
  3734. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3735. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3736. CLK_IND, RUN, FREQ_2, 0x21
  3737. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3738. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3739. CRT,RUN,LATCH_DATA, 0x00
  3740.  
  3741. [640,480,24,64,120]
  3742. # Unlock CRTC
  3743. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3744. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3745. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3746. # Dump CRT Controller Registers
  3747. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3e,0x04,0x12,0x3e,0x00,0x40
  3748. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3749. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3750. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  3751. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3752. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  3753. CRT,RUN,MODE_CONTROL,0x02
  3754. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3755. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  3756. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3757. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3758. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3759. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3760. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3761. # Lock CRTC Reg 11 for compatibility
  3762. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3763. # Dump ENG Register
  3764. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3765. # Dump MISCOUT Register
  3766. DIR,RUN,MISC_WRITE,0xef
  3767. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3768. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3769. CLK_IND, RUN, FREQ_2, 0x67
  3770. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3771. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3772. CRT,RUN,LATCH_DATA, 0x00
  3773.  
  3774.  
  3775. [640,480,24,52,100]
  3776. # Unlock CRTC
  3777. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3778. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3779. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3780. # Dump CRT Controller Registers
  3781. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  3782. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3783. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3784. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  3785. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3786. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3787. CRT,RUN,MODE_CONTROL,0x02
  3788. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3789. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  3790. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3791. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3792. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3793. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3794. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3795. # Lock CRTC Reg 11 for compatibility
  3796. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3797. # Dump ENG Register
  3798. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3799. # Dump MISCOUT Register
  3800. DIR,RUN,MISC_WRITE,0xef
  3801. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3802. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3803. CLK_IND, RUN, FREQ_2, 0x50
  3804. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3805. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3806. CRT,RUN,LATCH_DATA, 0x00
  3807.  
  3808. [640,480,24,48,90]
  3809. # Unlock CRTC
  3810. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3811. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3812. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3813. # Dump CRT Controller Registers
  3814. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  3815. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3816. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3817. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3818. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3819. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3820. CRT,RUN,MODE_CONTROL,0x02
  3821. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3822. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  3823. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3824. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3825. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3826. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3827. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3828. # Lock CRTC Reg 11 for compatibility
  3829. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3830. # Dump ENG Register
  3831. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3832. # Dump MISCOUT Register
  3833. DIR,RUN,MISC_WRITE,0xef
  3834. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3835. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3836. CLK_IND, RUN, FREQ_2, 0x4d
  3837. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3838. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3839. CRT,RUN,LATCH_DATA, 0x00
  3840.  
  3841.  
  3842. [640,480,24,37,75]
  3843. # Unlock CRTC
  3844. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3845. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3846. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3847. # Dump CRT Controller Registers
  3848. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x40,0x04,0xf7,0x1f,0x00,0x40
  3849. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3850. CRT,RUN,VERT_RETRACE_START,0xe6,0x09,0xdf
  3851. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf7,0xab,0xff
  3852. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3853. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3854. CRT,RUN,MODE_CONTROL,0x02
  3855. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3856. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  3857. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3858. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3859. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3860. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3861. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3862. # Lock CRTC Reg 11 for compatibility
  3863. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3864. # Dump ENG Register
  3865. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3866. # Dump MISCOUT Register
  3867. DIR,RUN,MISC_WRITE,0xef
  3868. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3869. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3870. CLK_IND, RUN, FREQ_2, 0x3a
  3871. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3872. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3873. CRT,RUN,LATCH_DATA, 0x00
  3874.  
  3875.  
  3876. [640,480,24,37,72]
  3877. # Unlock CRTC
  3878. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3879. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3880. CRT,RUN,REG_LOCK_1,0x48,0xa0
  3881. # Dump CRT Controller Registers
  3882. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3e,0x02,0x06,0x3e,0x00,0x40
  3883. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3884. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3885. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3886. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3887. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3888. CRT,RUN,MODE_CONTROL,0x02
  3889. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3890. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  3891. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3892. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3893. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3894. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3895. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3896. # Lock CRTC Reg 11 for compatibility
  3897. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3898. # Dump ENG Register
  3899. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3900. # Dump MISCOUT Register
  3901. DIR,RUN,MISC_WRITE,0xef
  3902. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3903. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3904. CLK_IND, RUN, FREQ_2, 0x3a
  3905. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3906. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3907. CRT,RUN,LATCH_DATA, 0x00
  3908.  
  3909. [640,480,24,31,60]
  3910. # Unlock CRTC
  3911. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3912. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3913. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3914. # Dump CRT Controller Registers
  3915. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8a,0x3d,0x06,0x0b,0x3e,0x00,0x40
  3916. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3917. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3918. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3919. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3920. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  3921. CRT,RUN,MODE_CONTROL,0x02
  3922. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3923. CRT,RUN,GENERAL_OUTPUT_PORT,0x72
  3924. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3925. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3926. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3927. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3928. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3929. # Lock CRTC Reg 11 for compatibility
  3930. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3931. # Dump ENG Register
  3932. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3933. # Dump MISCOUT Register
  3934. DIR,RUN,MISC_WRITE,0xef
  3935. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3936. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3937. CLK_IND, RUN, FREQ_2, 0x21
  3938. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3939. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3940. CRT,RUN,LATCH_DATA, 0x00
  3941.  
  3942. [640,480,16,64,120]
  3943. # Unlock CRTC
  3944. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3945. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3946. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3947. # Dump CRT Controller Registers
  3948. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3949. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3950. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3951. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3952. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3953. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3954. CRT,RUN,MODE_CONTROL,0x02
  3955. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3956. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3957. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3958. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3959. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3960. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3961. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3962. # Lock CRTC Reg 11 for compatibility
  3963. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3964. # Dump ENG Register
  3965. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3966. # Dump MISCOUT Register
  3967. DIR,RUN,MISC_WRITE,0xef
  3968. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3969. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3970. CLK_IND, RUN, FREQ_2, 0x67
  3971. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3972. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3973. CRT,RUN,LATCH_DATA, 0x00
  3974.  
  3975. [640,480,16,52,100]
  3976. # Unlock CRTC
  3977. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3978. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3979. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3980. # Dump CRT Controller Registers
  3981. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3982. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3983. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3984. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3985. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3986. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3987. CRT,RUN,MODE_CONTROL,0x02
  3988. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3989. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  3990. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3991. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3992. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3993. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3994. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3995. # Lock CRTC Reg 11 for compatibility
  3996. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3997. # Dump ENG Register
  3998. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3999. # Dump MISCOUT Register
  4000. DIR,RUN,MISC_WRITE,0xef
  4001. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4002. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4003. CLK_IND, RUN, FREQ_2, 0x50
  4004. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4005. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4006. CRT,RUN,LATCH_DATA, 0x00
  4007.  
  4008. [640,480,16,48,90]
  4009. # Unlock CRTC
  4010. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4011. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4012. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4013. # Dump CRT Controller Registers
  4014. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4015. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4016. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4017. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4018. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4019. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4020. CRT,RUN,MODE_CONTROL,0x02
  4021. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4022. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4023. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4024. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4025. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4026. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4027. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4028. # Lock CRTC Reg 11 for compatibility
  4029. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4030. # Dump ENG Register
  4031. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4032. # Dump MISCOUT Register
  4033. DIR,RUN,MISC_WRITE,0xef
  4034. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4035. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4036. CLK_IND, RUN, FREQ_2, 0x4d
  4037. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4038. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4039. CRT,RUN,LATCH_DATA, 0x00
  4040.  
  4041. [640,480,16,37,75]
  4042. # Unlock CRTC
  4043. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4044. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4045. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4046. # Dump CRT Controller Registers
  4047. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4048. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4049. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4050. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4051. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4052. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4053. CRT,RUN,MODE_CONTROL,0x02
  4054. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4055. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4056. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4057. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4058. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4059. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4060. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4061. # Lock CRTC Reg 11 for compatibility
  4062. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4063. # Dump ENG Register
  4064. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4065. # Dump MISCOUT Register
  4066. DIR,RUN,MISC_WRITE,0xef
  4067. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4068. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4069. CLK_IND, RUN, FREQ_2, 0x3a
  4070. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4071. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4072. CRT,RUN,LATCH_DATA, 0x00
  4073.  
  4074. [640,480,16,37,72]
  4075. # Unlock CRTC
  4076. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4077. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4078. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4079. # Dump CRT Controller Registers
  4080. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4081. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4082. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4083. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4084. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4085. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4086. CRT,RUN,MODE_CONTROL,0x02
  4087. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4088. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4089. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4090. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4091. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4092. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4093. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4094. # Lock CRTC Reg 11 for compatibility
  4095. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4096. # Dump ENG Register
  4097. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4098. # Dump MISCOUT Register
  4099. DIR,RUN,MISC_WRITE,0xef
  4100. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4101. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4102. CLK_IND, RUN, FREQ_2, 0x3a
  4103. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4104. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4105. CRT,RUN,LATCH_DATA, 0x00
  4106.  
  4107. [640,480,16,31,60]
  4108. # Unlock CRTC
  4109. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4110. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4111. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4112. # Dump CRT Controller Registers
  4113. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4114. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4115. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4116. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4117. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4118. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4119. CRT,RUN,MODE_CONTROL,0x02
  4120. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4121. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4122. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4123. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4124. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4125. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4126. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4127. # Lock CRTC Reg 11 for compatibility
  4128. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4129. # Dump ENG Register
  4130. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4131. # Dump MISCOUT Register
  4132. DIR,RUN,MISC_WRITE,0xef
  4133. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4134. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4135. CLK_IND, RUN, FREQ_2, 0x21
  4136. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4137. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4138. CRT,RUN,LATCH_DATA, 0x00
  4139.  
  4140. [640,480,8,64,120]
  4141. # Unlock CRTC
  4142. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4143. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4144. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4145. # Dump CRT Controller Registers
  4146. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4147. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4148. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4149. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4150. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4151. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4152. CRT,RUN,MODE_CONTROL,0x02
  4153. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4154. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4155. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4156. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4157. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4158. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4159. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4160. # Lock CRTC Reg 11 for compatibility
  4161. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4162. # Dump ENG Register
  4163. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4164. # Dump MISCOUT Register
  4165. DIR,RUN,MISC_WRITE,0xef
  4166. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4167. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4168. CLK_IND, RUN, FREQ_2, 0x67
  4169. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4170. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4171. CRT,RUN,LATCH_DATA, 0x08
  4172.  
  4173. [640,480,8,52,100]
  4174. # Unlock CRTC
  4175. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4176. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4177. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4178. # Dump CRT Controller Registers
  4179. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4180. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4181. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4182. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4183. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4184. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  4185. CRT,RUN,MODE_CONTROL,0x02
  4186. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4187. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4188. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4189. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4190. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4191. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4192. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4193. # Lock CRTC Reg 11 for compatibility
  4194. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4195. # Dump ENG Register
  4196. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4197. # Dump MISCOUT Register
  4198. DIR,RUN,MISC_WRITE,0xef
  4199. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4200. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4201. CLK_IND, RUN, FREQ_2, 0x50
  4202. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4203. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4204. CRT,RUN,LATCH_DATA, 0x08
  4205.  
  4206. [640,480,8,48,90]
  4207. # Unlock CRTC
  4208. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4209. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4210. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4211. # Dump CRT Controller Registers
  4212. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4213. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4214. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4215. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4216. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4217. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4218. CRT,RUN,MODE_CONTROL,0x02
  4219. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4220. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4221. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4222. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4223. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4224. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4225. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4226. # Lock CRTC Reg 11 for compatibility
  4227. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4228. # Dump ENG Register
  4229. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4230. # Dump MISCOUT Register
  4231. DIR,RUN,MISC_WRITE,0xef
  4232. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4233. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4234. CLK_IND, RUN, FREQ_2, 0x4d
  4235. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4236. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4237. CRT,RUN,LATCH_DATA, 0x08
  4238.  
  4239. [640,480,8,37,75]
  4240. # Unlock CRTC
  4241. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4242. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4243. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4244. # Dump CRT Controller Registers
  4245. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4246. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4247. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4248. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4249. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4250. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4251. CRT,RUN,MODE_CONTROL,0x02
  4252. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4253. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4254. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4255. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4256. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4257. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4258. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4259. # Lock CRTC Reg 11 for compatibility
  4260. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4261. # Dump ENG Register
  4262. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4263. # Dump MISCOUT Register
  4264. DIR,RUN,MISC_WRITE,0xef
  4265. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4266. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4267. CLK_IND, RUN, FREQ_2, 0x3a
  4268. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4269. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4270. CRT,RUN,LATCH_DATA, 0x08
  4271.  
  4272. [640,480,8,37,72]
  4273. # Unlock CRTC
  4274. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4275. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4276. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4277. # Dump CRT Controller Registers
  4278. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4279. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4280. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4281. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4282. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4283. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4284. CRT,RUN,MODE_CONTROL,0x02
  4285. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4286. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4287. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4288. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4289. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4290. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4291. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4292. # Lock CRTC Reg 11 for compatibility
  4293. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4294. # Dump ENG Register
  4295. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4296. # Dump MISCOUT Register
  4297. DIR,RUN,MISC_WRITE,0xef
  4298. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4299. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4300. CLK_IND, RUN, FREQ_2, 0x3a
  4301. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4302. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4303. CRT,RUN,LATCH_DATA, 0x08
  4304.  
  4305. [640,480,8,31,60]
  4306. # Unlock CRTC
  4307. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4308. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4309. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4310. # Dump CRT Controller Registers
  4311. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4312. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4313. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4314. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4315. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4316. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4317. CRT,RUN,MODE_CONTROL,0x02
  4318. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4319. CRT,RUN,GENERAL_OUTPUT_PORT,0x42
  4320. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4321. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4322. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4323. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4324. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4325. # Lock CRTC Reg 11 for compatibility
  4326. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4327. # Dump ENG Register
  4328. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4329. # Dump MISCOUT Register
  4330. DIR,RUN,MISC_WRITE,0xef
  4331. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4332. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4333. CLK_IND, RUN, FREQ_2, 0x21
  4334. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4335. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4336. CRT,RUN,LATCH_DATA, 0x08
  4337.  
  4338.  
  4339.  
  4340.  
  4341.  
  4342.  
  4343.